The present invention relates generally to an apparatus for decoding of composite video to provide high quality serial digital output and, more particularly, to an interpolation circuit for removing any time-base errors on the composite video input.
The usual time base correction (TBC) technique is to lock the input digitizing and processing clock to the horizontal sync edge. The digitized video signal is then written to a memory with a clock that follows the time base errors of the input signal. The time base errors are removed when the digital data is read from memory with a stable clock. This technique was introduced in 1973 and described in U.S. Pat. No. 3,860,952 which issued Jan. 14, 1975 to Tallent et al. Another patent (U.S. Pat. No. 4,297,728) that issued on Oct. 27, 1981 to Lowe uses a charge-coupled device (CCD) shift register memory to remove time base errors. It discloses a technique of changing the delay time of the CCD shift register by changing the clock frequency. The clock is not locked to the horizontal sync or burst in this case. The frequency is increased to make the line shorter if it is too long, or the frequency is decreased to make the line longer to time the output to a reference signal.
There are many problems associated with all of the present TBC techniques especially when the write clock is also used for the comb filter processing. One problem that occurs when time base errors are present and the clock is locked to the sync signal is that the chroma cycles no longer line up between lines as they do when the write clock is locked to the burst signal. This causes a reduction in the luminance and chrominance separation which causes smears and beats in the output signal. Another problem is that time base errors usually exceed the frequency pull range of a voltage controlled crystal oscillator (VCXO), therefore, an LC oscillator must be used to follow the time base errors on the input. LC oscillators have a wider tracking range than VCXOs but they also have more phase noise and sync locked loops always have more residual errors than burst locked loops. While fairly good at removing medium to large time base errors, these problems usually cause some clock jitter which creates some time base error in digitizing a perfectly stable input signal. All residual timing errors reduce the luma/chroma separation.
A conventional time base corrector with digital comb filter is illustrated in FIG. 1. The comb filter in block 124 is typically an off-the-shelf chip with an analog-to-digital converter (ADC), 3 tap digital comb filter with one digital-to-analog converter (DAC) for the Y output and a second DAC for the C output. The main problem with this configuration is the requirement for two separate ADCs and DACs in the video path. Both the ADCs and the DACs cause some signal degradation. The off-the-shelf comb filter chips usually provide 8 bit processing with poor specifications. Time base correction is accomplished by locking the voltage controlled LC oscillator (VCLCO) in block 103 to the separated sync from block 101. The sync locked PLL (phase-locked loop) in block 102 and the VCLCO in block 103 typically produce approximately 10 ns of clock jitter on the write clock. The burst-locked PLL in block 113 and the VCXO in block 114 typically produce less than 1 ns clock jitter. The lower jitter rate is required for good luma/chroma separation in the comb filter.
The present invention uses a burst locked VCXO for the digitizing and processing clock to provide a very stable clock for comb filter separation of luma and chroma, demodulation of the chroma and noise immunity. The problem is that there is no inherent time base error correction using a stable write clock that is not locked to the sync signal. Therefore, a different time base error correction technique must be used to remove the time base error after the comb filter and chrominance demodulation if the circuit is to accept non-time-base-corrected inputs directly from VTRs. With this new technique, every pixel in every line of video is continuously and individually interpolated to a new positional value in sub-pixel increments as required to remove the time base error. This requires several multiplications of surrounding pixel values for every pixel position.
This invention provides a new and unique time base correction technique with unique supporting circuitry. Instead of using an LC oscillator that is locked to the sync of the incoming video, it uses a single voltage controlled crystal oscillator (VCXO) that is locked to the chroma burst of the input signal. This VCXO is used for digitizing the input video, comb filtering, and chroma demodulation. Time base correction is accomplished by lengthening or shortening each video line in sub-pixel increments by using digital interpolation of consecutive pixels. The start of line position and length of line is moved in full pixel and/or sub-pixel increments as needed to correct the signal to the desired position and line length. In this system the write clock is crystal stable while the video may have positional and frequency errors in comparison to the stable burst locked write clock. That causes the video signal to be digitized with more or fewer pixels per line than would be created with a sync locked write clock. That also means that the number of pixels per line and the pixel size do not meet International Radio Consultative Committee (CCIR) 601 standards when there are time base errors on the input. CCIR (now ITU-R) 601 is a recommendation adopted around the world for uncompressed digital video used in studio television production.
By using a unique error measurement circuit that detects the sync positional error on every line, the circuit is able to determine the positional error of the beginning of every line and the amount of stretch or compression error from the beginning of the line to the end. The circuit then determines the coefficients necessary to correct this error for every pixel from the beginning of every line to the end. One prior art technique is that of dropping pixels to time the signal to approximately the correct position. The pixel drop technique causes a discontinuity in the pixel stream that distorts a high frequency signal such as an edge or series of edges such as bars or patterns in a video signal. There is also a residual jitter problem created by the pixel drop technique. If the digitizing clock is 27 MHz each pixel value is 37 ns. That means the residual time base error will be 37 ns peak to peak (p-p) plus the error detection inaccuracy which is usually around 10 ns.
In this invention, pixels are not simply dropped or duplicated, however, the pixel values within a line are all stretched or compressed by continuously calculating new pixel values from the values of the original pixels so that the new position of every pixel is much more accurate than simply dropping or adding pixels. The correct number of interpolated pixels are as equally spaced as the original pixels although there may be more or fewer of them in the interpolated line than in the original line.
The interpolation circuit compensates for too few pixels per video line by compressing the stretched pixels that are present to the proper size and creating new pixels from a portion of the pixels immediately before and after the created pixel. The interpolation circuit compensates for too many pixels per line by incorporating the values of the input pixels into the proper number of pixels for a line of video by interpolation. It also compensates for too few pixels per line by incorporating the values of the input pixels into the correct number of pixels by interpolation.
In a preferred embodiment, three multipliers are used to create an accurate value for the new pixels. This technique creates a more accurate intermediate value pixel. For example, if the new pixel value is halfway between two input pixels, a two multiplier interpolator would simply multiply the pixels on either side by 0.5 and add the results. This technique works well for flat areas and linear slopes. However, when the two input pixels are on either side of the peak of a sine wave input signal the new pixel value will be only 70% of the desired amplitude. When three multipliers are used with an equation that uses data from the 4 surrounding pixels, they can incorporate a formula that considers the slope of the two pixels before the new pixel calculation and the slope after the new pixel. This technique is described more fully below. The result is a new pixel value that is extremely close to the desired value at the top of the sine wave.
Parallel four point interpolators are used for luminance (Y) and chrominance (C) data. Data from the interpolators is written into a buffer memory at the rate at which new pixels are created and skipped when pixels are dropped, but can be read from the buffer at a constant rate to smooth the pixel rate. The buffer may be combined with a larger frame memory for synchronization of the video signal or stand alone as a TBC correction buffer memory. The luminance (Y), R-Y (red minus white) and B-Y (blue-minus white) output signals from either the buffer memory or the frame memory are multiplexed into a 27 MHz CCIR-601 type signal with a B-Y, Y, R-Y, Y sequence. The time base corrected digital video signal could be converted back to analog at this point for many video applications, however, in a preferred embodiment of this invention, the digital signal is converted into a 270 Mb serial digital signal.
This invention uses several unique circuits to support the interpolation circuit to make a complete time base correction circuit. These include a unique error detection circuit and a unique noise immunity circuit. There is also a noise measurement circuit that is used to adapt the TBC to real world conditions with noise on the video input. The output from the noise measurement circuit can be used to modify the rate or gain of time base correction, comb filter fail thresholds, burst lock gain and noise correction gain.
The present technique uses more digital circuitry and less analog circuitry than the previous TBC techniques. When the previous TBC techniques were invented, the cost of digital circuitry was high and the cost of analog circuitry was low in comparison; but, since then, the cost of digital circuitry has dropped while the cost of analog circuitry has remained relatively constant. That makes this new technique practical to implement at this time and will make it even less expensive to implement in the future as the trend to lower digital costs continues. This new technique is also superior to the previous techniques in the accuracy of time base correction and in Y/C separation. It can be used to time base correct composite, component and separated Y/C signals.